Co-Design

Our Services:

We offer our services of algorithm-hardware co-design for machine learning, digital signal processing and image/video processing on the project basis:

  • You get the complete solution delivered and the full co-design cycle from algorithm stage to the hardware stage performed

  • You delegate or facilitate the particular phase of co-design cycle

Algorithm Design

  • Development and training of hardware-friendly deep neural network models using optimisation techniques such as quantisation, pruning, compression, etc.

  • Development of fixed/floating-point hardware-friendly math models for DSP or image/video processing kernels in SciPy, Matlab or Octave

  • Algorithm optimisation/redesign for hardware implementation on FPGA/eASIC/ASIC

Optimisation for Existing Devices

  • Algorithm optimisation for real-time and low-power execution on existing edge, embedded or mobile devices and processors

Chip Design

  • Development of hardware micro-architecture tailored to the algorithm and its performance/power model using Python/C++/SystemC

  • Development of bit-accurate C++ models for hardware verification

  • Design and verification of hardware kernel/core/processor using SystemVerilog/HLS

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Turation Ltd is registered in England & Wales with Company Number 12052508

Registered address: 71-75 Shelton Street, Covent Garden, London, WC2H 9JQ, United Kingdom

UK VAT number: 340 4973 04

© 2019-2020 Turation Ltd